L3GD20 MEMS interface module header. More...

#include "ex_gyroscope.h"

Data Structures
struct	L3GD20Config
	L3GD20 configuration structure. More...
struct	L3GD20VMT
	`L3GD20` virtual methods table. More...
struct	L3GD20Driver
	L3GD20 3-axis gyroscope class. More...

Macros
#define	l3gd20GyroscopeGetAxesNumber(devp)
	Return the number of axes of the BaseGyroscope.
#define	l3gd20GyroscopeReadRaw(devp, axes)
	Retrieves raw data from the BaseGyroscope.
#define	l3gd20GyroscopeReadCooked(devp, axes)
	Retrieves cooked data from the BaseGyroscope.
#define	l3gd20GyroscopeSampleBias(devp)
	Samples bias values for the BaseGyroscope.
#define	l3gd20GyroscopeSetBias(devp, bp)
	Set bias values for the BaseGyroscope.
#define	l3gd20GyroscopeResetBias(devp)
	Reset bias values for the BaseGyroscope.
#define	l3gd20GyroscopeSetSensitivity(devp, sp)
	Set sensitivity values for the BaseGyroscope.
#define	l3gd20GyroscopeResetSensitivity(devp)
	Reset sensitivity values for the BaseGyroscope.
#define	l3gd20GyroscopeSetFullScale(devp, fs)
	Changes the L3GD20Driver gyroscope fullscale value.
Version identification
#define	EX_L3GD20_VERSION "1.1.3"
	L3GD20 driver version string.
#define	EX_L3GD20_MAJOR 1
	L3GD20 driver version major number.
#define	EX_L3GD20_MINOR 1
	L3GD20 driver version minor number.
#define	EX_L3GD20_PATCH 3
	L3GD20 driver version patch number.

#define	L3GD20_GYRO_NUMBER_OF_AXES 3U
	L3GD20 gyroscope system characteristics.
#define	L3GD20_250DPS 250.0f
#define	L3GD20_500DPS 500.0f
#define	L3GD20_2000DPS 2000.0f
#define	L3GD20_GYRO_SENS_250DPS 0.00875f
#define	L3GD20_GYRO_SENS_500DPS 0.01750f
#define	L3GD20_GYRO_SENS_2000DPS 0.07000f
#define	L3GD20_GYRO_BIAS 0.0f
L3GD20 communication interfaces related bit masks
#define	L3GD20_DI_MASK 0xFF
#define	L3GD20_DI(n)
#define	L3GD20_AD_MASK 0x3F
#define	L3GD20_AD(n)
#define	L3GD20_MS (1 << 6)
#define	L3GD20_RW (1 << 7)
L3GD20 register addresses
#define	L3GD20_AD_WHO_AM_I 0x0F
#define	L3GD20_AD_CTRL_REG1 0x20
#define	L3GD20_AD_CTRL_REG2 0x21
#define	L3GD20_AD_CTRL_REG3 0x22
#define	L3GD20_AD_CTRL_REG4 0x23
#define	L3GD20_AD_CTRL_REG5 0x24
#define	L3GD20_AD_REFERENCE 0x25
#define	L3GD20_AD_OUT_TEMP 0x26
#define	L3GD20_AD_STATUS_REG 0x27
#define	L3GD20_AD_OUT_X_L 0x28
#define	L3GD20_AD_OUT_X_H 0x29
#define	L3GD20_AD_OUT_Y_L 0x2A
#define	L3GD20_AD_OUT_Y_H 0x2B
#define	L3GD20_AD_OUT_Z_L 0x2C
#define	L3GD20_AD_OUT_Z_H 0x2D
#define	L3GD20_AD_FIFO_CTRL_REG 0x2E
#define	L3GD20_AD_FIFO_SRC_REG 0x2F
#define	L3GD20_AD_INT1_CFG 0x30
#define	L3GD20_AD_INT1_SRC 0x31
#define	L3GD20_AD_INT1_THS_XH 0x32
#define	L3GD20_AD_INT1_THS_XL 0x33
#define	L3GD20_AD_INT1_THS_YH 0x34
#define	L3GD20_AD_INT1_THS_YL 0x35
#define	L3GD20_AD_INT1_THS_ZH 0x36
#define	L3GD20_AD_INT1_THS_ZL 0x37
#define	L3GD20_AD_INT1_DURATION 0x38
L3GD20_CTRL_REG1 register bits definitions
#define	L3GD20_CTRL_REG1_MASK 0xFF
#define	L3GD20_CTRL_REG1_XEN (1 << 0)
#define	L3GD20_CTRL_REG1_YEN (1 << 1)
#define	L3GD20_CTRL_REG1_ZEN (1 << 2)
#define	L3GD20_CTRL_REG1_PD (1 << 3)
#define	L3GD20_CTRL_REG1_BW0 (1 << 4)
#define	L3GD20_CTRL_REG1_BW1 (1 << 5)
#define	L3GD20_CTRL_REG1_DR0 (1 << 6)
#define	L3GD20_CTRL_REG1_DR1 (1 << 7)
L3GD20_CTRL_REG2 register bits definitions
#define	L3GD20_CTRL_REG2_MASK 0x3F
#define	L3GD20_CTRL_REG2_HPCF0 (1 << 0)
#define	L3GD20_CTRL_REG2_HPCF1 (1 << 1)
#define	L3GD20_CTRL_REG2_HPCF2 (1 << 2)
#define	L3GD20_CTRL_REG2_HPCF3 (1 << 3)
#define	L3GD20_CTRL_REG2_HPM0 (1 << 4)
#define	L3GD20_CTRL_REG2_HPM1 (1 << 5)
L3GD20_CTRL_REG3 register bits definitions
#define	L3GD20_CTRL_REG3_MASK 0xFF
#define	L3GD20_CTRL_REG3_I2_EMPTY (1 << 0)
#define	L3GD20_CTRL_REG3_I2_ORUN (1 << 1)
#define	L3GD20_CTRL_REG3_I2_WTM (1 << 2)
#define	L3GD20_CTRL_REG3_I2_DRDY (1 << 3)
#define	L3GD20_CTRL_REG3_PP_OD (1 << 4)
#define	L3GD20_CTRL_REG3_H_LACTIVE (1 << 5)
#define	L3GD20_CTRL_REG3_I1_BOOT (1 << 6)
#define	L3GD20_CTRL_REG3_I1_INT1 (1 << 7)
L3GD20_CTRL_REG4 register bits definitions
#define	L3GD20_CTRL_REG4_MASK 0xF1
#define	L3GD20_CTRL_REG4_SIM (1 << 0)
#define	L3GD20_CTRL_REG4_FS_MASK 0x30
#define	L3GD20_CTRL_REG4_FS0 (1 << 4)
#define	L3GD20_CTRL_REG4_FS1 (1 << 5)
#define	L3GD20_CTRL_REG4_BLE (1 << 6)
#define	L3GD20_CTRL_REG4_BDU (1 << 7)
L3GD20_CTRL_REG5 register bits definitions
#define	L3GD20_CTRL_REG5_MASK 0xDF
#define	L3GD20_CTRL_REG5_OUT_SEL0 (1 << 0)
#define	L3GD20_CTRL_REG5_OUT_SEL1 (1 << 1)
#define	L3GD20_CTRL_REG5_INT1_SEL0 (1 << 2)
#define	L3GD20_CTRL_REG5_INT1_SEL1 (1 << 3)
#define	L3GD20_CTRL_REG5_HPEN (1 << 4)
#define	L3GD20_CTRL_REG5_FIFO_EN (1 << 6)
#define	L3GD20_CTRL_REG5_BOOT (1 << 7)
L3GD20_INT1_CFG register bits definitions
#define	L3GD20_INT1_CFG_MASK 0xFF
#define	L3GD20_INT1_CFG_XLIE (1 << 0)
#define	L3GD20_INT1_CFG_XHIE (1 << 1)
#define	L3GD20_INT1_CFG_YLIE (1 << 2)
#define	L3GD20_INT1_CFG_YHIE (1 << 3)
#define	L3GD20_INT1_CFG_ZLIE (1 << 4)
#define	L3GD20_INT1_CFG_ZHIE (1 << 5)
#define	L3GD20_INT1_CFG_LIR (1 << 6)
#define	L3GD20_INT1_CFG_AND_OR (1 << 7)
L3GD20_INT1_SRC register bits definitions
#define	L3GD20_INT1_SRC_MASK 0x7F
#define	L3GD20_INT1_SRC_XL (1 << 0)
#define	L3GD20_INT1_SRC_XH (1 << 1)
#define	L3GD20_INT1_SRC_YL (1 << 2)
#define	L3GD20_INT1_SRC_YH (1 << 3)
#define	L3GD20_INT1_SRC_ZL (1 << 4)
#define	L3GD20_INT1_SRC_ZH (1 << 5)
#define	L3GD20_INT1_SRC_IA (1 << 6)
Configuration options
#define	L3GD20_USE_SPI TRUE
	L3GD20 SPI interface switch.
#define	L3GD20_SHARED_SPI FALSE
	L3GD20 shared SPI switch.
#define	L3GD20_USE_I2C FALSE
	L3GD20 I2C interface switch.
#define	L3GD20_SHARED_I2C FALSE
	L3GD20 shared I2C switch.
#define	L3GD20_USE_ADVANCED FALSE
	L3GD20 advanced configurations switch.
#define	L3GD20_BIAS_ACQ_TIMES 50
	Number of acquisitions for bias removal.
#define	L3GD20_BIAS_SETTLING_US 5000
	Settling time for bias removal.

Functions
void	l3gd20ObjectInit (L3GD20Driver *devp)
	Initializes an instance.
void	l3gd20Start (L3GD20Driver devp, const L3GD20Config config)
	Configures and activates L3GD20 Complex Driver peripheral.
void	l3gd20Stop (L3GD20Driver *devp)
	Deactivates the L3GD20 Complex Driver peripheral.

L3GD20 data structures and types.
#define	_l3gd20_methods_alone
	`L3GD20` specific methods.
#define	_l3gd20_methods
	`L3GD20` specific methods with inherited ones.
#define	_l3gd20_data
	`L3GD20Driver` specific data.
enum	l3gd20_fs_t { L3GD20_FS_250DPS = 0x00 , L3GD20_FS_500DPS = 0x10 , L3GD20_FS_2000DPS = 0x20 }
	L3GD20 full scale. More...
enum	l3gd20_odr_t { L3GD20_ODR_95HZ = 0x00 , L3GD20_ODR_190HZ = 0x40 , L3GD20_ODR_380HZ = 0x80 , L3GD20_ODR_760HZ = 0xC0 }
	L3GD20 output data rate and bandwidth. More...
enum	l3gd20_bw_t { L3GD20_BW0 = 0x00 , L3GD20_BW1 = 0x40 , L3GD20_BW2 = 0x80 , L3GD20_BW3 = 0xC0 }
	L3GD20 low pass filter 1 bandwidth. More...
enum	l3gd20_bdu_t { L3GD20_BDU_CONTINUOUS = 0x00 , L3GD20_BDU_BLOCKED = 0x80 }
	L3GD20 block data update. More...
enum	l3gd20_hpm_t { L3GD20_HPM_NORMAL = 0x00 , L3GD20_HPM_REFERENCE = 0x10 , L3GD20_HPM_AUTORESET = 0x30 , L3GD20_HPM_BYPASSED = 0xFF }
	L3GD20 HP filter mode. More...
enum	l3gd20_hpcf_t { L3GD20_HPCF_0 = 0x00 , L3GD20_HPCF_1 = 0x01 , L3GD20_HPCF_2 = 0x02 , L3GD20_HPCF_3 = 0x03 , L3GD20_HPCF_4 = 0x04 , L3GD20_HPCF_5 = 0x05 , L3GD20_HPCF_6 = 0x06 , L3GD20_HPCF_7 = 0x07 , L3GD20_HPCF_8 = 0x08 , L3GD20_HPCF_9 = 0x09 }
	L3GD20 HP configuration. More...
enum	l3gd20_lp2m_t { L3GD20_LP2M_ON = 0x00 , L3GD20_LP2M_BYPASSED = 0xFF }
	L3GD20 LP2 filter mode. More...
enum	l3gd20_end_t { L3GD20_END_LITTLE = 0x00 , L3GD20_END_BIG = 0x40 }
	L3GD20 endianness. More...
enum	l3gd20_state_t { L3GD20_UNINIT = 0 , L3GD20_STOP = 1 , L3GD20_READY = 2 }
	Driver state machine possible states. More...
typedef struct L3GD20Driver	L3GD20Driver
	Structure representing a L3GD20 driver.

Detailed Description

L3GD20 MEMS interface module header.

Definition in file l3gd20.h.

Data Structures

Macros

Functions

L3GD20 data structures and types.

Detailed Description