Table of Contents
ChibiOS/RT – High-performance RTOS
ChibiOS/RT is the real-time kernel of the ChibiOS embedded platform, engineered for predictability, efficiency, fine‑grained timing control, and real SMP support for next-generation MCUs and MPUs.
It combines a fully static architecture, true tickless operation, µs‑class system time, and a fully preemptive scheduler with very low context switch and thread flyback latencies, delivering a small, fast, and highly deterministic RTOS suitable for both open source and commercial products.
Key Qualifying Features
Fully static architecture
ChibiOS/RT is designed around a fully static kernel.
- No dynamic memory allocation required inside the kernel.
- All OS objects and memory are defined at compile time.
- Enables deterministic behavior, simpler analysis, and an easier path to certification and long‑term maintenance.
This approach is particularly well suited for safety‑relevant, resource‑constrained, and long‑lived embedded systems.
Fully preemptive with ultra‑low latency
ChibiOS/RT implements a fully preemptive scheduler optimized for extremely low latency:
- High‑priority threads can preempt lower‑priority ones at any time.
- Very short context switch times and thread flyback latencies (from interrupt to the highest‑priority ready thread) on supported architectures.
- Enables tightly bounded response times and high control loop frequencies.
This makes ChibiOS/RT particularly suitable for real‑time control, motor drives, and drone/UAV flight stacks, where worst‑case latency is critical.
True tickless operation (not just idle tick suppression)
ChibiOS/RT implements real tickless scheduling:
- The system does not rely on a fixed periodic tick.
- Timer events are scheduled exactly when needed, based on hardware timers.
- Reduces unnecessary wakeups and CPU load.
- Lowers power consumption and avoids the jitter typical of fixed‑tick RTOS designs.
A traditional fixed tick can still be enabled when needed, but the core design is event‑driven and tickless.
High‑resolution system time
System time in ChibiOS/RT is derived from high‑resolution timers, enabling microsecond‑class (µs) delays and timing:
- Fine‑grained control over timeouts and delays.
- Well suited for precise control loops, motor control, drone/UAV stabilization and navigation, communication timing, and other latency‑sensitive tasks.
- Allows tight synchronization between tasks and peripherals.
Real SMP support for multi‑core MCUs and MPUs
ChibiOS/RT provides true symmetric multiprocessing (SMP) capabilities:
- Single kernel image running across multiple cores.
- Workloads can be efficiently distributed over available cores.
- Designed for current and next‑generation multi‑core microcontrollers and microprocessors.
This enables better scalability and performance when moving from single‑core to multi‑core platforms.
Typical Use Cases
ChibiOS/RT is used in a wide range of real‑time embedded systems where deterministic timing, low latency, and tight resource budgets are essential:
| Use case | Typical roles for ChibiOS/RT |
|---|---|
| Drones and UAVs | Flight control, stabilization loops, sensor fusion, navigation, and payload control with hard real‑time constraints |
| Robotics and autonomous systems | Motion control, kinematics, sensor processing, and coordination of multiple actuators and sensors |
| Motor control and drives | FOC (Field‑Oriented Control), BLDC/PMSM drives, servo control, and high‑frequency control loops |
| Audio and signal processing | Low‑latency audio pipelines, DSP‑style tasks, and precise scheduling of sample processing |
| Power management / low‑power systems | Battery‑powered devices, low‑power modes, and applications where tickless operation reduces energy consumption |
| Industrial and instrumentation | PLC‑like control, data acquisition, instrumentation front‑ends, and tightly timed I/O handling |
| Connectivity and communication | Protocol handling, time‑critical communication windows, and synchronized data transfers |
(Real deployments range from hobby projects to professional and industrial products, often on STM32 and other popular MCU families.)
ChibiOS/RT at a Glance
| Aspect / Feature | ChibiOS/RT focus and design choices | Common alternatives (typical RTOS designs) |
|---|---|---|
| Architecture & determinism | Monolithic, fully preemptive RTOS with strong focus on predictable, analyzable timing | Monolithic or modular kernels; determinism depends on configuration and enabled subsystems |
| Scheduling latency | Optimized for very low context switch times and short thread flyback latencies | Context switch and wakeup times vary widely by implementation and configuration |
| Memory model | Fully static kernel, no dynamic allocation required in the core | Many RTOS kernels allow or expect dynamic allocation for some OS objects |
| Tick model | True tickless, event-driven scheduling (fixed tick optional) | Commonly based on a periodic system tick; often provide tickless idle or tick suppression |
| System time resolution | High‑resolution, µs‑class system time and delays | Often optimized around millisecond‑level ticks; higher resolution may require extra configuration or code |
| SMP capabilities | Real SMP support for single‑image, multi‑core MCUs/MPUs | SMP support varies; many RTOSes focus on single core, some offer SMP on selected architectures |
| Footprint (kernel only) | Very small footprint, tuned for MCU‑class, resource‑constrained systems | Footprint ranges from very small kernels to larger, feature‑rich platforms |
| HAL / drivers | Integrated HAL with broad MCU coverage (e.g., STM32 and others) | Some RTOSes focus mainly on the kernel and rely on external or vendor‑specific HALs; others provide a large, unified driver model |
| Licensing & commercial use | Open Source (GPLv3, Apache‑2.0) plus commercial licensing options for proprietary and safety‑related projects | Typically permissive or copyleft open source licenses; commercial support options vary by vendor or service provider |
This table is intended as a high‑level, technical overview of common RTOS design choices. Actual capabilities and configurations depend on the specific RTOS, version, port, and project settings.
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